Santa Cruz, Calif. — IC design teams no longer need to buy expensive accelerators to boost simulation speeds, according to Henry Verheyen, president and CEO of startup Liga Systems Inc. His company is stepping into public view at next week's Design Automation Conference with NitroSim, a plug-in “hybrid simulator” that claims to boost register-transfer-level simulation by 10 to 100 times.
NitroSim is claimed to handle up to 300 million logic gates using a single PCI plug-in card with a custom VLIW processor. Once the netlist is compiled, Liga Systems says, everything runs like the user's original software simulation environment–only faster. At $50,000, NitroSim costs far less than most acceleration or emulation systems.
Verheyen, a 22-year EDA veteran, has held engineering management positions in such companies as InTime, Avanti, Cadence, Quickturn, Aptix, Xilinx and Viewlogic. Several years ago, he came across some fast simulation technology in use internally at NEC. “I saw the potential almost immediately,” he said.
Verheyen launched Liga Systems in 2003 with the NEC technology, but he said he can't discuss the details of the technology transfer. To- day, Liga Systems (Sunnyvale, Calif.) has 20 employees, has raised what the EDA veteran called “significant” funding and is going into beta sites with NitroSim.
“The verification problem is growing . . . and design sizes are really getting hard to verify using any methodology,” Verheyen said. “Using hybrid simulation, we can accelerate simulation by 10 or 100 times for full-chip and multichip systems, at a price point that's incredibly attractive to customers.”
While simulation accelerators map logic into components such as FPGAs, Verheyen said, NitroSim compiles software for execution on a custom processor. Some accelerators do use custom processors, but there's a difference, he said: “They map a portion of the netlist to each processor. We map all of our logic to memory, and then the entire netlist is run from an instruction stream coming out of memory only.”
By running simulation from a memory instruction stream, Verheyen said, NitroSim can support all the features a software simulator can support, including four-state logic and behavioral logic. NitroSim will run with all major simulators and is initially targeting Mentor Graphics' ModelSim, Synopsys' VCS and Cadence Design Systems' NC-Verilog, he said. It uses the Verilog programming language interface (PLI) and outputs VCD format files for debugging.
The NitroSim PCI card is a full-size, 66-MHz, 3.3-volt PCI standard-compliant pc board. The VLIW processor is implemented in Xilinx Virtex-4 FPGAs and 2.5 Gbytes of memory. An additional 8 Gbytes of memory holds stimulus and other user data. Bundled software includes an RTL and gate-level netlist compiler and a run-time software driver.
One way in which the card speeds simulation, Verheyen said, is by avoiding the “cache miss” memory problem. This frequently occurs in simulation, he said, because simulation data may use up 4 Gbytes of memory, while an on-chip cache may be only 1 or 2 Mbytes. Thus, most of the time a simulator needs data, it hasn't been loaded into the cache and must be obtained from memory, he noted.
To use NitroSim, a designer would first compile the design to the hybrid simulator. There is “some learning,” Verheyen said, because the compiler uses slightly different mapping technology than a software simulator. But thus far, he said, engineers are finding compilation to be an easy process. A typical compile speed is 10 million gates/hour per CPU, he said. Multiple PCI cards can be used for compilation, but only one card can execute simulation.
The entire Verilog netlist is mapped to the PCI card, including synthesizable and nonsynthesizable portions. The original host CPU maintains file I/O activity, along with PLI plug-ins such as C-language models. After compiling, Verheyen said, users simply run their simulations. “The hardware will be activated, and everything is hidden from the user,” he said.
Liga Systems is planning on production shipments in about six months, Verheyen said.