Verifying your system design macro model accuracy with Spice test circuits - Embedded.com

Verifying your system design macro model accuracy with Spice test circuits

Spice models have gainedpopularity over the past years. While IC manufacturers strive toprovide their customers with accurate models, system designers dictatethe trend of accuracy and innovations in Spice macro model development.

Many IC companies claim that their models are the best and that theyoffer revolutionary features. What they often fail to provide is acircuit that allows their customer to verify the accuracy of the macromodel.

Operationalamplifiermacro models areprobably the most sought after. While they can be extremely helpfulwhen accurate, they can also cause serious problems, especially whenthey are not in the hands of experts.

Most system design engineers take the time to test the op amp macromodel by itself before implementing it in a more comprehensive circuit.I've seen people get erroneous simulation results and then call up theapps group of the IC manufacturer to tell them that the model they'vedeveloped is not functional.

When the applications person tries to get some details about what'snot working in the model, the response is usually, “I used a differentmodel from your competitor, and it works just fine in my circuit.”

The truth is that all models are not the same, and some may not workin a particular setting. Instead of investigating op amp macro models'shortcomings, it would be helpful to have a collection of circuits thatallows users to test any model, in other words, universal test circuitsfor op amp macro models.

Parameters for test
Macro models differ in their levels of complexity or simplicity. Muchlike the datasheets, the models should emulate parameters relevant toapplications in which the op amp is thought to be appropriate.

For example, if you use a rail to rail output op amp, you should beable to test and verify the output saturation voltage vs. the loadcurrent. Likewise, a lownoise amplifier should have a model thatemulates at least the voltage noise.

Despite their differences, amplifier macro models have some thingsin common. These are the most interesting parameters – they are usuallythe starting point of the simulation.

Open loop gain,phase margin . The open loop gain vs. frequency is probably thefirst test that engineers perform to evaluate the amplifier'smacro-model performance.

This test is important because it shows the DC gain, -3dB frequency,crossover frequency (gain bandwidthproduct in the case of a voltage feedback amplifier ) and thephase margin all in one simple little circuit. Figure 1 below shows the testcircuit.

Figure1. When testing open loop gain and phase, the user should choose afrequency range that goes beyond the unity gain bandwidth of theamplifier.

The RC network ensures thatthe output is biased at a suitable DC voltage. At higher frequencies,the capacitor shorts the inverting input to ground, placing the op ampin open loop.

The capacitor is chosen to be large to provide an early roll off (f = 2RC ). Thus, even if the op ampyou're testing has a very low frequency dominant pole, you would beable to simulate, see a smooth transition and the 20dB per decade rolloff.

When testing open loop gain andphase, the user should choose afrequency range that goes beyond the unity gain bandwidth of theamplifier.

When using a rail-to-rail output model, it is important to use thetest circuit with the same load indicated in the datasheet. Otherwise,you will probably not get the result you would expect, especially theDC gain (AOL = g m RL ).

Slew rate. Thisis another element defining the amplifier speed that every model shouldhave. Slew rate is definedby the ratio of the tail current over thecompensation capacitance. Depending on the macro model, the capacitorthat determines the slew rate can be placed at the input or in aseparate network.

Since we already know the relationship Idt = Cdv , we can simply use thecircuit of Figure 2 below andtake the derivative of theoutput to get the slew rate. 

Figure2. When running the simulation for slew rate, make sure your setup isin transient.

When running the simulation for slew rate, make sure your setup isin transient. Ensure that the input signal also has fast enough rise time and fall time (edges) as to notlimitthe slew rate.

On the other hand, the input signal frequency must be chosenaccording to the op amp's speed. An input signal that's too fast willcause convergence problems.

CMRR, PSRR .These two parameters are not always modeled, but they can be equallyimportant. CMRR and PSRR are fairly easy to implement in a model, asthey usually consist of a simple RC network, resistor divider andvoltage- controlled voltage source.

CMRR is especially importantin non-inverting configurations because of modulation. On the otherhand, PSRR is important in anyapplication where the voltage supply is susceptible to anyinterference.

Figure3. CMRR is especially important in non-inverting configurations becauseof modulation.

The test circuits presented in Figure3 above , and Figure 4 below allow the user to simulate these two parameters. If they are modeledcorrectly, the pole and zero location should match the graphs in thedatasheet.

Note that you can choose to invert either CMRR or PSRR on the plotscreen by simply inserting a minus sign preceding the voltageprobe. 

Figure4. PSRR is important in any application where the voltage supply issusceptible to any interference.

Outputimpedance. This is a specification often omitted from thedatasheet altogether, but is sometimes necessary. When modeledcorrectly, the output impedance helps to get a more accuratesettling-time behavior when the amplifier is driving capacitive loads.Output impedance is also needed to calculate the proper componentvalues when a compensation scheme is considered for stability purposes.

The test circuits provide the user with three curves for theoutputimpedance at different gains in the frequency domain. The outputimpedance is obtained by taking the ratio of the output voltage overthe 1A current source. The graph in Figure5 below shows the output impedance of the LMV791 to be approximately 100.

Figure5. When modeled correctly, the output impedance helps to get a moreaccurate settling-time behavior when the amplifier is drivingcapacitive loads.

Voltage,current noise. This is one of the areas in which the creators ofamplifier macro models have made progress. Some of today's models allowyou to simulate the voltage noise with its flicker noise component andcurrent noise with excellent accuracy. Modeling noise into the macromodel doesn't take much more computing or simulation time.

However, it can be a difficult task, at least until you have figuredout the right equations that make the voltage-noise density curve mimicthe datasheet graph with the 1/f corner as well.

You can easily test the voltage- noise density by taking the outputof a voltage follower (with a voltagesource of 0V ) on a log-logscale.

To simulate the current-noise density, use the same circuit andplace a 100 k resistor in series with the non-inverting terminal. Inthe probe window, make sure to divide the result by 100E3 or whateverresistor value you choose.

Using a large resistor value makes the current noise dominate sinceit is coupled into the resistance. Thus, voltage and thermal noisesbecome negligible compared to the current noise.

Make sure to specify the output voltage in the analysis setup windowof PSpice. In Figure 6 below ,we specify the output voltage as V out and the input voltage as V in , and check the box”noise-enabled.”

Figure6. To simulate the current-noise density, use the same circuit andplace a 100 k resistor in series with the non-inverting terminal.

Input biascurrent/ input offset voltage. These parameters are probably theeasiest to model. The input offset voltage can easily be implemented asa voltage-controlled voltage source at the input whose value is takenfrom the datasheet.

In general, you won't even have to use a specific circuit to test V os and I B . You can use any circuit previouslydescribed, and simply activate the voltage and current probes in PSpiceto see them.

Figure7. You can use any circuit previously described, and simply activatethe voltage and current probes in PSpice to see them.

Figure 7 above shows theinput bias current at 1.5pA and the input offset voltage at 1.48mV.Note that the supply current is also shown to be 1.15mA at±2.5V.

Outputsaturation voltage. This parameter is sometimes known as thedropout voltage. It is particularly important inrail-to-railoutput models. Thisis because it indicates the output swing as a function of the loadcurrent and can help you choose the appropriate op amp, especially whendriving heavy loads or when dynamic range is a concern.

The test circuit uses a simple DC sweep with two equal inputvoltages of opposite magnitude to replicate the sourcing and sinking ofthe load current.

Supply currentvs. supply voltage. The test circuit in Figure 8 below sweeps the currentacross the supply and allows you to determine how much current is drawnfrom the amplifier at different supply voltages. This test isparticularly helpful for power conscious applications. The slope of thesupply current curve can easily be added into the model.

Figure8. This test circuit sweeps the current across the supply and allowsyou to determine how much current is drawn from the amplifier atdifferent supply voltages.

Overshoot,transient response. This test circuit serves two purposes:testing the transient response (whethersmall signal or large signal ) and the overshoot.

Overshoot is important because it indicates how much ringing anamplifier has with a capacitive load. Overshoot is a measure ofstability in time domain; it is the equivalent of what peaking is inthe frequency domain.

Some macro models use extra passive components to mimic theovershoot accurately. But generally, if the phase margin is accurate,the overshoot should come pretty close to what it should be.

You can test the transient response using the same test circuitwithout the 100pF capacitor. Some datasheets indicate whether a smallcapacitance is used as a load when measuring the small signaltransient. In that case, simply use the same value of capacitance.

Common-modevoltage range. This parameter is important as it allows the userto see the head room and how far away your input signal needs to befrom the supply.

Figure9. The first test circuit uses a voltage-controlled voltage source.

The first test circuit in Figure 9above uses a voltage-controlled voltage source. In the secondtest circuit in Figure 10 below ,we sweep the voltage from -2.5V to 2.5V.

Figure10. In the second test circuit, we sweep the voltage from -2.5V to 2.5V.

Phase reversal. Phase reversal occurs in some amplifiers when the input signal exceedsthe input common-mode voltage range. During a phase reversal, theoutput changes polarity and may cause damage to the op amp, resultingin system lockups.

The test circuit is a simple voltage follower with a sine wave inputof 6V. The output waveform indicates that the macro model, just likethe op amp, doesn't exhibit any phase reversal. It is clipped at±2.5V.

The test circuits described are not meant to replace the evaluationof the device on the bench. Rather, they provide the user with theflexibility of making quick assessments with respect to the accuracy ofthe macro model.

Soufiane Bendaoud is AmplifiersMarketing Manager at NationalSemiconductor Corp.

To read a PDF version of this story, go to “Verifymacro model accuracy with PSpice test circuits.”

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