Virtual prototyping with IEEE 1666 SystemC TLM-2.0 -

Virtual prototyping with IEEE 1666 SystemC TLM-2.0

The IEEE 1666 SystemC TLM-2.0 interoperability standard is a key catalyst for the wide adoption of virtual prototyping in the electronics industry. The standard ensures that peripheral, interconnect, and processor models provide a standard interface for the memory map-based SoC bus. Ideally, the creation of virtual prototypes can now be assembled like Legos–quickly snapping together models from multiple vendors to form a larger system. The reality, however, is a little different.

Many interfaces next to the SoC bus are very important if we want to simulate a system. This holds true specifically if the simulation is used for embedded software development.

If we take a look at the block diagram of a modern mobile application processor, such as Exynos 5, it becomes clear how many interfaces are exposed and connected to parts located around the SoC. The parts range from simple sensors to complex subsystems such as modems. A deeper look into the user manual of this processor reveals other important aspects. The programmer is exposed to more than 30 pages of how to program interrupts and clocks. None of these aspects are covered by the TLM-2.0 standard. Below, I've provided a short list of interfaces and why they play an important role for an embedded software developer:

  • Interrupts: No operating system will boot without the ability of the processor to react to events sent from the hardware.
  • Clocks: Clocks are important even though a virtual prototype model only captures the abstract functional behavior of the hardware instead of simulating the clock triggered logic. Specifically the frequency can impact the functional behavior. As an example, the delay between timer interrupts depends on the frequency of the supplied clock. The scheduling of software functions inside an OS is often dependent on the proper sequencing of events coming from system timers, watchdogs, or real time clocks.
  • Voltages: The regulation of voltages is a major aspect of low-level software such as firmware, drivers, and the power-management framework(s). Models have to be sensitive to illegal voltage settings so that faulty embedded software will behave similar on the virtual prototype as it does on the actual hardware.
  • Reset: Resetting subsystems is an integral part during boot-up as well as during fault handling to recover from an unexpected situation.
  • Off-chip interfaces: Embedded software interacts with components that are situated around the SoC and connected via interfaces such as I2 C, SPI, UART, HDMI, MIPI, or USB. Specifically when running a full stack such as Linux and Android, the devices that are connected via those interfaces need to be captured in the virtual prototype also.

Today, no modeling standard exists for the above five interfaces. This can make it difficult to assemble a virtual prototype where models come from different sources. The complication is not only for the off-chip interfaces, but also for simple things such as the clock. As an example, some models require the integer number of the clock frequency as input; others depend on the actual toggle of a Boolean signal. Thus, there is little alignment on the syntax and semantics of interfaces, and specific adaptors are required to glue the parts together.

Synopsys's SystemC Modeling Library
We're addressing the need for better alignment on many of the above mentioned aspects through our SystemC Modeling Library (SCML). SCML is based on TLM-2.0, but provides modeling patterns that address the above mentioned aspects. A source-code implementation of the SCML API library is openly available and works in any IEEE 1666 SystemC compatible simulation environment. SCML also provides crucial visibility and control over the model to the embedded software developer, ranging from enabling basic pure debugging up to tracing and test of the framework integration.

Short term, using a modeling library with modeling patterns will help (see sidebar for Synopsys' openly available source code). Longer term, the question arises how much of the above can make it into a modeling standard, specifically for the off-chip interfaces. Here, a key consideration is that every interface may introduce new requirements. Maybe, a different perspective is needed to make interfaces scalable. What about having the standard bodies that govern the consistency of hardware interfaces also include the model aspects in the standard?

Achim Nohl is a technical marketing manager for virtual prototyping at Synopsys. He actively publishes technical articles, conference papers and blog posts around the topic of developing embedded software using virtual prototypes. His specialty is bringing up firmware, drivers and operating systems for the most recent CPUs and IPs. Achim holds a diploma degree in Electrical Engineering from the Institute for Integrated Signal Processing Systems at the Aachen University of Technology, Germany. Before joining Synopsys, Achim has worked in various engineering and marketing roles for LISATek and CoWare.

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