The MFC700 is a 6U VPX-REDI buffer memory node with support for up to 16-Gbytes of memory on the baseboard, dual XMC mezzanine sites and support for Serial RapidIO (sRIO) fabric. Designed for applications that buffer large amount of high-speed data, the MFC700 can be used in signal and image processing applications, as well as data recording subsystems. Uses of buffer memory include high-speed temporary storage, interleaving, data aggregation and warehousing or the need for additional system memory through a fabric.
The MFC700 supports up to 32-Gbytes DDR2 SDRAM memory in a single slot with 4-16Gbytes on the MFC700 and two 2- to 8-Gbytes on VMETRO MM-6171 buffer memory node XMC modules. The board supports four x4 high-speed Serial RapidIO links to the VPX P1 connector via an 8-port Serial RapidIO switch and additional I/Os to the backplane. Dual Xilinx Virtex-5 FPGAs serve as the memory controllers for the DDR2 SDRAM with ECC memory.
The MFC700 provides additional RocketIO connections between FPGAs and the backplane to give developers flexibility and performance in their data movement. The MFC700 also includes advanced, corner-turning DMA engines, which are especially useful in matrix transposition, where converting from columns to rows can eliminate significant processor overhead.
Pricing: Starts at $20,000.
Availability: Eight to 12 weeks ARO.
Datasheet: Click here.