What's New on Embedded.com (6-3-11 to 6-9-11) - Embedded.com

What’s New on Embedded.com (6-3-11 to 6-9-11)


Embedded Newsletter for 06-09-11

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June 9, 2011

New on Embedded.com


Sangram Keshari Maharana & Avineet Singh

Improving USB 3.0 with better I/O management


Managing intelligent I/O processing on DSP + GPP SoCs

Performing efficient arctangent approximation

Finding counterfeits

Editor's Note

Bernard Cole Bernard Cole
Site Editor

There’s been a lot of activity in the embedded mobile processor sector this week, perhaps because the WSTS (World Semiconductor Trade Statistics) is projecting a 5.5 % increase in global chip sales this year, or maybe it’s just the fierce competition in the wireless smartphone/tablet market.

For example, Cortus licensed its RISC core to RIM, Applied Micro adds an ARM core to its PowerPC lineup , Actions Semi teams with MIPS on an Android SoC, ARM licensee Samsung qualifies a 28 nm CMOS process, and ARM adds cache coherency to its CPU architecture.

But good times also attract thieves, as Jack Ganssle warns in “Finding counterfeits . ” Fortunately, he says, the technology that is making the prosperity possible is also what will provide the solution.

If you are interested in burying your head in a technically meaty design article, here are a few on Embedded.com you might enjoy: Improving USB 3.0 , managing dual core ARM/DSP I/O, 3-D mobile device design, 3-D IC design , and 3-D animated simulation modeling.

For those of you who are fans of device teardowns, check out the one just published in sister publication EDN Magazine: “The HTC Surround: achieving differentiation through enhanced sound,” a look at a first-generation Windows Phone 7 handset to assess both current platform status and future potential enhancements.

Design How Tos

Improving USB 3.0 with better I/O management

This article explores the impact of USB 3.0 on mobile handheld hardware and software design and what can be done, through proper I/O management, to improve interactions between USB 3.0 connected components.

Managing intelligent I/O processing on DSP + GPP SoCs

This Product How-To article about TI's OMAP-L138 C6-Integra DSP + ARM processor SoC details the steps a developer needs to follow in building an application that must balance I/O processing tasks between a general purpose microcontroller and a digital signal processor on the same IC.

Performing efficient arctangent approximation

Here is a fast and efficient way to compute the arctangent of a complex number especially if you are interested in performing high speed digital signal computations.

Creating stereoscopic 3-D for mobile devices

S3-D experiences are migrating from the large screen to mobile devices, providing realistic—and glasses-free—personalized viewing experiences on the go.

3-D IC design: New possibilities for the wireless market

The question is not whether 3-D ICs with through-silicon vias will be designed but whether the EDA tools and infrastructure will emerge to build them.

Enhancing simulation studies with 3D animation

This article describes the use of 3D animation in simulation-centric workflows to augment early verification activities, such as those used in Model-Based Design. The evolution of technology and domain specialization in the simulation and 3D graphics fields presents several challenges for using 3D animation in simulation-centric studies. A set of examples illustrates how to meet these challenges.

Combining FPGAs & Atom x86 CPUs for SBC design flexibility

This product how-to article describes how an embedded X86 single board computer's feature set need no longer be set in stone, shows how this was done in Kontron's PCIe/104 MICROSPACE MSMST SBC with an Intel Atom E600C processor and an Altera Cyclone IV GX FPGA.

Two methodologies for ASIC conversion

Just how one converts from an FPGA design to an ASIC influences the value proposition for the end-product.

Product News

Mentor extends embedded design into ESL

Common Embedded Software Development Platform integrates electronic system level (ESL) capabilities into CodeSourcery tools to support development from virtual prototypes to hardware emulation and boards.

QA·C 8.0 deep-flow analysis improves code checking for safety-critical apps

Phaedrus Systems now supplies the new release of the QA·C code analysis tool from Programming Research. QA·C 8.0 uses sophisticated technology to go beyond static code analysis by performing deep-flow dataflow analysis.

TI's PCM3070 stereo audio codec speeds soundbar development

Texas Instruments Incorporated (TI) is offering a flexible stereo audio codec with two fully-programmable miniDSP cores to support customized processing solutions for use in soundbars and docking stations. The PCM3070 includes a stereo 24-bit digital-to-analog converter (DAC), stereo 24-bit analog-to-digital converter (ADC) and integrated phased-locked loop (PLL) for flexible audio clock generation.

ST's LSM320DL motion sensing module packs five degrees of freedom

The LSM320DL motion sensing module from STMicroelectronics combines a 3-axis digital accelerometer with a 2-axis digital gyroscope in a single device to provide a multi-sensor module with five degrees of freedom.

Combined evaluation/dev kits from Cymbet and TI enable energy harvesting experimentation

Cymbet Corporation has announced that their EnerChip solid state battery energy harvesting (EH) evaluation kits now support Texas Instruments Incorporated's MSP430 Value Line LaunchPad development kit.

X-FAB design IP Blocks speed dev times for MEMS accelerometers

X-FAB Silicon Foundries is offering ready-to-use design IP blocks for acceleration sensors to its MEMS foundry service offerings.

STripFET VI power MOSFETs from ST handle higher voltages, save energy in solar, telecom and consumer apps

The latest STripFET VI DeepGATE power MOSFETs from STMicroelectronics can withstand maximum voltages up to 80V, allowing the MOSFETS to be used in solar applications (micro-inverters), telecommunications, networking and power supplies for servers.

Target Compiler's MP Designer tool suite speeds development for heterogeneous multicore SoC architectures

Target Compiler Technologies has announced the upcoming release of MP Designer, a new tool-suite supporting the design of heterogeneous multicore systems-on-chip (SoCs). The tool suite supports key design tasks such as the parallelization of sequential C code for multicore architectures and the generation of a communication fabric between multiple cores in SoC platforms.

120-MHz ARM Cortex-M3 MCU features Ethernet, USB and external memory controller

NXP has started to ship in volume its LPC1788, an ARM Cortex-M3-based MCU with an integrated LCD controller.

Call for Abstracts

ARM® TechCon 2011 Call For Abstracts

We are now accepting abstracts for the technical program at ARM® TechCon 2011, to be held October 25 – 27 at the Santa Clara Convention Center in Santa Clara, CA.

The technical program will be presented over three days. On October 25, we will offer tracks on Chip Design. On October 26 and 27 the tracks will cover Software and System Design.

Deadline to submit: Friday, June 17, 2011

To Submit an Abstract for the Chip Design Conference, October 25, click here:

Chip Design Track Descriptions

SoC Architecture & Analysis
SoC Design begins with architectural concepts and analysis. Sessions in this track will describe the architectural choices, IP integration issues, and system analyses that define the front end of ARMIP-based SoC design.

SoC Design & Verification
These sessions will cover key aspects of the design and verification flow for ARM processor-based SoCs, from conceptual frameworks to best practices.

SoC Design for Power & Performance
As technology scales for increased circuit density and performance, the need to reduce power consumption increases in significance as designers strive to utilize the advancing silicon capabilities. In these sessions the focus will be on the techniques than can be used to match performance or power targets.

SoC design depends upon reusable silicon IP. These sessions will focus on both the IP qualification process and some novel new alternatives in IP for ARM processor-based SoCs.

SoC Verification of Challenging Structures Modern verification methodology has developed primarily in the pure-digital space. But there are many IP blocks in ARMprocessor-based SoCs, from interconnect structures to tightly-integrated mixed-signal functions, that require extensions of the existing verification orthodoxy. Sessions here will examine some of these cases.

To Submit an Abstract for the Software and Systems Design Conference, October 26 & 27, click here:

Software and Systems Design Conference Tracks

Android / Open Source
Development tools, middleware, native application development, turnkey solutions, optimized drivers… Android, Linux, FreeRTOS…

Computing Platforms
Standardization, specifications, board/module design, subsystems, servers, mobile/netbooks, consumer.

Producing code and debugging for ARM instruction set.

Efficient Software Design on ARM-Powered systems Optimized stacks, Multi-Core optimization, C-code, memory and cache use, data types & structures, OpenCL, Programming optimally for NEON.

Human Interface Design
Multiple Screens, Motion sensing and controller-free interfaces, trackpads, Voice recognition, Visual computing, augmented reality…

Low Power Design
Hardware and software techniques to maximize performance while reducing power and trade-offs, Power estimation, Low Power MCUs.

Microcontroller Platforms
Off-the-shelf devices, development tools and systems, simplified programming, application design.

Networking & Connectivity
Wired/wireless connectivity, Integration in hardware and software, networking stacks, power management, etc., CAN, USB, Sensors.

Safety & Security
Firmware safety, security against tampering in hardware and/or software, physical or network interference, CoreSight, TrustZone-based services, virtualization

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