I’ve been having fun with a Raspberry Pi lately, showing it to fellow engineers and asking: “Find the CPU.” Most can’t.
Though even in person it’s really hard to see, the RAM chip is on top of the processor using a packaging technique common in the mobile phone business called “Package on Package” (PoP). In this case the CPU is soldered to the board, and the RAM to 168 balls on top of the processor package. Propagation delays go down and packaging density increases.
Smaller is better, and we’re sure seeing this in the microcontroller world. Freescale’s ARM Cortex M0+ MKL02Z32CAF4R is probably the smallest ARM part at either 1.994 x 1.94 mm (according to the packaging documentation) or 2 x 1.61 mm (according to the datasheet, which later references the packaging docs). It’s in a wafer-level chip-scale package (WLCSP), where an entire wafer of ICs is fully formed, plastic, balls and all, and then individual devices are sawed apart. The silicon is exposed around the edges.
I don’t have one of these handy for a comparison picture, but the next photo shows an ADP172 voltage regulator in a WLCSP package. This device has four balls and is 1 x 1 mm, or half as long in each dimension as Freescale’s device. There’s not much to it, and I have no idea how one is supposed to prototype with these.
Perhaps the smallest CPU is Atmel’s 8-bit ATtiny20-UUR, which is just 1.555 x 1.403 mm, not much bigger than the ADP172 shown above. It has twelve balls.
Transistors have disappeared. Glance at a TFT screen and you’re looking through millions of transistors. CPUs aren’t far behind.
Atmel and Microchip have long offered low-pin-count microcontrollers, which I think opens a huge range of applications where just a little intelligence is needed. Now Freescale is bringing 32 bits to the game, a great move. TI has some tiny 16-bitters and NXP offers Cortex M0 parts in a package just a bit bigger than Freescale’s.
To put this in perspective, when I was in college in the early 70s the school had one computer to service 40,000 students. The Univac 1108 was a 36-bit machine that ran at 1.3 MHz. There was no RAM of course, instead having one megaword of core, which is about 4 MB. The Freescale part, which is practically invisible, is 32 bits, runs at 48 MHz, and has 1/100 the memory. So couple that 2 x 2 mm device with an SO16 4 MB RAM and, except for the I/O, a barely-visible system would have more power than the Univac. Add a 1 GB flash part and the system’s mass storage would exceed the 1108’s room-full of tape drives (50 MB per tape) and FASTRAND drum memories (99 MB each).
Of course, the mainframe cost $10m (about $60m in today’s deflated greenbacks) and the Cortex-M0+ and memory would give you change from a ten dollar bill.
A 1970ish Univac 1108. A faster system using a Cortex M0+ and external memory would occupy about the space of the operator’s small fingernail.
So where will it stop? How much smaller can components get yet still be amenable to reasonable assembly processes?