The widespread use of wireless communications and the rise in digital content consumption in handsets are creating new opportunities and correspondingly new system design challenges for OEMs. In these systems, one key design challenge revolves around how designers can continue to integrate more system functions and yet maintain affordability and acceptable ergonomics for mass markets.
The new OEM design challenges, in turn, create a new set of dynamics for the semiconductor industry. Because of the nature of the system functions–largely centered on the processing of video, voice and data–the processing elements required to support each of the system functions are unique. As a result, het- erogeneous multiprocessing on a chip has become the new architecture standard for performance system-on-chip design, replacing single embedded processor implementations of previous-generation SoCs. On the surface, this transition might seem straightforward. Instead of hosting one embedded processor, now multiple types of processing elements are on the chip, usually adding a digital signal processor and a graphics or multimedia engine to more efficiently support operations the embedded processor was not originally designed to handle.
But heterogeneous multiprocessing ushers in a new phenomenon that will significantly change the way OEMs use SoCs. What is this new phenomenon? System-level differentiation shifting from hardware to software. Because of the complex nature of processing video, voice and data, SoC developers are increasingly relying on outsourced processing elements and other intellectual property to meet their time-to-market and price-point demands. Therefore, as system functions consolidate onto a single device, powered by processing elements readily available to anyone, OEMs will find it increasingly difficult to differentiate in hardware. Algorithmic and system-level software differentiation gives the OEM more opportunity to win.
The shift to software differentiation results in the need for SoCs that support high degrees of flexibility so that OEMs can differentiate their products. To achieve that flexibility, SoC developers are now raising the priority and focus on how data is moved to, from and within a chip. This is the responsibility of the on-chip SoC interconnect buses. Data flows are essential to keeping the processing elements on the chip optimally fed so that they can perform at their peak, and with the correct conditional access at the user level. Those interconnect fabrics form the foundation for OEM differentiation via software
As a result of this phenomenon, the complexities of SoC data flow management has gone up exponentially, and the task of architecting and maintaining an interconnect strategy has become expensive. With constant downward pressure on chip prices and shortening chip life cycles, the question for SoC development projects is how can more design complexity be absorbed and produce flexible chips rapidly and cost effectively such that the return on investment is sufficient to meet the company's business goals?
The answer is to outsource the interconnect design. It no longer matters whether an in-house team can engineer an interconnect solution given enough time and money. Just as it makes no sense to build an embedded processor today, the costs of developing and maintaining an interconnect architecture in-house is too high in money and risk. The significant increase in funding required to support the increasing complexity, and the potential for product introduction delays, stemming from bugs or performance deficiencies found late in the design cycle (as a result of the complexity increase), are no longer necessary elements of any SoC development project.
Proven third-party interconnect solutions are available that provide the necessary interconnect advanced fabric features and data flow services to manage the increase in interconnect complexity. In addition to the interconnect, tools are available that enable SoC developers to model data flows and create management schemes before the chip is developed, removing interconnect design from the critical path of the SoC development cycle and reducing schedule risk. Late market requirement changes and product family development can also be better accommodated by understanding the scope of the interconnect architecture before SoCs are actually developed.
Outsourcing the SoC interconnect design is a direct, straightforward measure that can be taken to significantly reduce the impact of the OEM software-shift phenomenon on the semiconductor industry. The economics have been proven by market-leading semiconductor companies that have already outsourced their interconnect needs and thus accelerated their business goals. They are realizing the compounding benefits associated with outsourcing the interconnect.
By Phil Casini (email@example.com), vice president of marketing and business development at Sonics Inc.