Xilinx, Inc. offers what the company claims is the industry's first 4M logic cell device. The Virtex UltraScale VU440 FPGA is targeted for next-generation ASIC and complex SOC prototyping and emulation. With a capacity of 50 million equivalent ASIC gates and the industry's highest I/O count, the Virtex UltraScale VU440 FPGA leverages the UltraScale architecture's ASIC-like clocking, next-generation routing, and logic block enhancements to deliver best in class utilization, making it ideal for ASIC prototyping and large scale emulation.
Production qualified at the 28nm node, the SSI technology is built on TSMC's CoWoS (Chip-on-Wafer-on-Substrate) 3D IC process to achieve even greater silicon scaling, as well as power and performance benefits by integrating multiple components on a single device. Along with 5X more inter-die bandwidth and a unified clocking architecture across slice boundaries, UltraScale 3D IC devices deliver a virtual monolithic design experience for fast implementation and design closure.
The Virtex UltraScale VU440 device provides unprecedented levels of performance, system integration, and bandwidth on a single chip. As the largest member of the UltraScale family, it delivers 4.4M logic cells, 1,456 user I/Os, 48 x 16.3 Gb/s backplane-capable transceivers, and 89 Mb of block RAM, and, according to the company, breaking previous records by more than doubling the industry's previous highest capacity Xilinx Virtex-7 2000T device.
See a demonstration of 10 ARM Cortex-A9 CPUs executing in a single Virtex UltraScale VU440.